Projects
TRANSMISSION GATE LOGIC BASED 32:1 MUX CIRCUIT USING CADENCE
- By Prabhjot Bhathal
- Feb 14, 2018
Skills
Cadence CMOS ASIC DesignCompany
San Jose State University• Individual Project. Created a 32:1 MUX circuit using Cadence in Cadence Virtuoso. • Aimed to understand Cadence Virtuoso and apply CMOS circuit’s knowledge simultaneously.